This design is mainly composed of the following three parts: First, the sound chip CXA1691, which is an AM / FM stereo radio IC that integrates circuits such as amplitude modulation, frequency modulation, phase-locked loop, and stereo decoding. Second, the phase loop chip BU2614, through the rational design of the loop filter, the frequency can be stabilized at 88 ~ 108MHz. 3. The DC-DC conversion circuit realizes the low power consumption and single power supply of the system.
System hardware circuit design
1 Design of receiving circuit
CXA1691S has a wide range of power supply voltages, and the circuit can work normally in the range of 2 to 10V. In addition, it also has stereo indicating LED drive circuit and FM squelch and other functions. Since this system does not involve amplitude modulation, the 16 pins (AM intermediate frequency input), 15 pins (band selection), 10 pins (AM antenna input) and 5 pins (AM local oscillator) in the chip are all floating, and Capacitor can be connected to ground. Connect the 7-pin (FM local oscillator) and 12-pin (FM input) to the input of the loop filter, so that the frequency can be controlled by using a phase-locked loop. The specific circuit is shown in Figure 1.
Figure 1 CXA1691 radio circuit
2 Phase-locked scheme design The second main part of this design is the design of phase-locked loop circuit. Here are considered the following options.
Solution 1: Use D / A to control the voltage-controlled oscillator to generate a variable local oscillator frequency. The tuning method of this solution is relatively simple, it is easy to implement the automatic search function, and the frequency can be fine-tuned to make the radio effect reach the best state. Debugging hardware through debugging software, so debugging is relatively easy. But it also has two shortcomings: First, the amplitude of the signal generated by the DAC is quantified, and it cannot accurately lock the local oscillator frequency; second, there is no loop control, and the stability is not as good as the phase locked loop. But by using an 8-bit DAC, the control voltage can be stepped to 20mV. If a 12-bit DAC is used, the control is more precise. It can be seen that the above two shortcomings can be overcome.
Option 2: Use PLL frequency synthesis method. The PLL frequency digital tuning system is mainly composed of a voltage controlled oscillator (VCO), a phase comparator (PD), a low-pass filter (LE), a programmable frequency divider, and a highly stable crystal oscillator. Its structure is shown in Figure 2. . Among them, the reference frequency divider, PD and programmable frequency divider can all be integrated in the chip BU2614, and the VCO oscillator output fosc is used as the local oscillator frequency. BU2614 can be controlled with a single chip microcomputer. The high stability of the crystal oscillator greatly improves the frequency stability of the local oscillator, and can also realize multiple functions such as frequency step sweep, preset radio station, radio station storage, etc. by controlling the frequency division coefficient of the single-chip microcomputer.
Figure 2 PLL schematic
The above two schemes are widely used in current product design. In order to stabilize the radio effect and realize the continuity of automatic channel search, this design adopts scheme two. The circuit is shown in Figure 3.
Figure 3 PLL circuit
3 Power supply design Another characteristic part of this system is the design of the DC-DC converter circuit. After trying many methods, I finally chose MAX770 as the power supply from 3V to 5V, which can output + 5V, the current fully meets the design requirements at 1A, and the ripple is small, less than 100mV, if the filtering measures are better. Its circuit is simple, the output voltage is also quite stable, the circuit is shown in Figure 4.
Figure 4 3V to 5V power supply design
4 clock display The DS12887 real-time clock chip used in this design is made of CMOS technology, with internal crystal oscillator and clock chip backup lithium battery, and is compatible with the pins of the commonly used clock chips MC146818B and DS1287. The clock circuit designed with the DS12887 chip does not require any peripheral circuits and devices, and has a good microcomputer interface. The chip contains a 128-byte RAM unit and software interface, of which 14 bytes are the clock unit and the control / status register, 114 bytes are general-purpose RAM, which can be used by the user. All RAM unit data has power-down protection and can be used to implement The function of electricity storage.
This system also has other very unique features, such as automatic platform search and lock and power-off storage.
Conclusion This design is a simple and practical FM receiver solution. The application of CXA1691 greatly reduces the complexity of circuit design, it integrates most of the circuits together, and enhances the stability of the system. I have used NE564 and some auxiliary circuits to design the radio circuit, neither the sensitivity of the radio nor the signal-to-noise ratio can be comparable to this design. In addition, it integrates audio power amplifier circuit to make a qualitative leap in sound quality.
The design of the phase-locked loop circuit is very important in this design, especially the design of the loop filter. I have tried the triode circuit, and also tried the combination of LM358 and LC circuit, and finally determined the design of the program from the bandwidth and stability.
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