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Abstract: QAMi5516 is the latest digital TV (DVB-C) set-top box demodulation and decoding single chip from STMicro. The article introduces the main functions and features of QAMi5516, analyzes its internal structure and working principle, and gives a typical application of DVB-C digital cable set-top box based on the chip.Key words: QAMi5516; DVB-C; digital TV; set-top box; demodulation; decoding
1 Overview
The QAMi5516 is STMicro's latest high-performance digital cable television (DVB-C) set-top box single chip for the low-end and mid-end markets. It is also the first ST-based QAM (quadrature amplitude). Modulation) A chip that integrates a digital cable signal demodulator with back-end MPEG video decoding, thus enabling analog TV users to watch digital cable TV programs.
In addition to the traditional audio and video decoding functions, the QA-Mi5516 also has strong expansion capabilities, enhanced graphics processing and post-processing to improve audio and video quality. At the same time, since the QAM demodulator and the MPEG decoder are integrated, the cost of the hardware chipset is reduced, the circuit design is simplified, the reliability and cost performance of the product are improved, and the production cost is also reduced. The Chinese set-top box market of nearly 100 million cable TV home users is undoubtedly of great significance.
2 Features
The QAMi5516 is a highly integrated, cost-effective demodulation and decoding single chip that integrates a 32-bit ST20 CPU, QAM demodulator, audio/video MPEG-2 decoder, display and image processing functions, and various systems. Peripheral interface, etc. In addition to all the basic functions of a digital cable set-top box, it can also run middleware to realize the value-added services of digital TV operators, and has a rich peripheral interface such as Ethernet interface and USB interface, thus not only establishing value-added services. A good hardware environment, but also to meet the needs of users on the Internet browsing, e-commerce and electronic program guides.
figure 1
The basic features of the QAMi5516 are as follows:
â— in accordance with ITU-T J. 83 Annexes A/B/C, DVB-C standards;
â—Support TSMF;
â— Integrated QAM demodulator, which can support demodulation of different modulation modes such as 16, 32, 64, 128 and 256QAM;
â— Integrated MPEG-2 MP@ML video decoder, PAL/NTSC/SECAM video encoder, matched filter and adaptive equalizer;
â— Support clock programmable;
â— low power consumption;
â— Support two layers of PCB layout design;
â— Available in PBGA package, 416 pins.
3 Internal structure principle
Figure 1 is a block diagram of the internal functions of the QAMi5516. The working principle of each main module in QA-Mi5516 is now introduced.
3.1 High performance CPU
The ST20-C201 CPU core in the QAMi5516 consists of the ST20C2+CPU, a diagnostic controller unit (DCU) for real-time debugging, internal memory (8kB SRAM, 8kB instruction cache, 8kB data buffer) and a 16-level interrupt controller. Among them, ST20C2+CPU is a high-performance 32-bit enhanced RISC CPU with a frequency of up to 180MHz. The DCU is used to boot the CPU and monitor all system-on-chip through the IEEE 1194.1-compliant test access port, Test Access PortTM. The DCU has an in-circuit emulation unit (ICE) and a logic state analysis unit (LSA) to support real-time trace debugging of the software. For interrupts, the interrupt level controller (ILC) can be used to map 38 interrupt sources to the 16 programmable interrupt level inputs of the interrupt controller, which can be controlled and changed by software. Among all 16 interrupts, level 15 The highest priority is given, and the 0th priority is the lowest.
3.2 External memory and its interface
The QAMi5516's external memory can be extended by an external memory interface (EMI), which operates up to 100MHz and supports 1GB of address space, which is sufficient for embedded systems. The entire memory address space is divided into four areas, area 0 is mapped to on-chip SRAM, area 1 is mapped to off-chip SDRAM (expanded via SMI interface), area 2 is mapped to on-chip peripheral registers, and area 3 is mapped to external memory (via EMI interface extension). Area 3 is further divided into six BANKs of programmable size, with a maximum of 256MB and a minimum of 4MB. Table 1 shows the typical configuration of this area.
Table 1 Typical configuration of area 3
| BANK | initial address | End address | Size (MB) | Type of use |
| 5 | 0x7F80 0000 | 0x7FFF FFFF | 8 | ROM |
| 4 | 0x7F00 0000 | 0x7F7F FFFF | 8 | SDRAM |
| 3 | 0x7000 0000 | 0x7EFF FFFF | 240 | Peripheral |
| 2 | 0x6000 0000 | 0x6FFF FFFF | 256 | Peripheral |
| 1 | 0x5000 0000 | 0x5FFF FFFF | 256 | SDRAM |
| 0 | 0x4000 0000 | 0x4FFF FFFF | 256 | SDRAM |
3.3 QAM demodulator
The QAM demodulator is fully compatible with I-TU-T J. 83 Annexes A/B/C and DVB-C standards, support for demodulation of different modulation modes such as 16, 32, 64, 128 and 256QAM. For Japanese DBS systems, it is also capable of post-processing TSMF to extract separate Transport Streams (TS) from multiple frames.
The QAMi5516 demodulator integrates a high-performance analog-to-digital converter that directly handles IF signals from the tuner (including 7.2 MHz, 36 MHz, and 44 MHz up to 57 MHz). In addition, it also has digital AGC for tuner gain control and IF gain control, etc., and can reduce the bit error rate (BER) of QAM modulated bit stream recovery.
3.4 STBus Interconnect Bus
In order to improve the internal data transmission bus bottleneck of the chip, QAMi5516 uses high-speed advanced STBus based on OMEGA2 technology to achieve interconnection. OMEGA2 provides high on-chip bandwidth and low access latency for data transfers between modules. Its multiplexed router allows simultaneous read and write between multiple modules, resulting in maximum bandwidth utilization.
3.5 MPEG video decoder
The MPEG video decoder is used for decompression of MPEG2 bitstreams and construction of video streams, which is actually implemented by decoding a pair of subpictures (pictures). In general, while the new screen is being displayed, the next sub-picture has begun to insert the corresponding boot code detector, so that the CPU can automatically set the corresponding register to decode the next sub-picture. In addition, the video decoder also includes an MPEG sub-picture decoder, an image display unit, and an OSD unit, and its multi-layer display function greatly enriches the television display effect.
3.6 Digital Encoder
The digital encoder is used to convert a 4:2:2 digital video stream into a standard PAL/SECAM/NTSC analog baseband signal, or a 4:4:4 digital video stream can be converted to RGB and YUV signals. It provides 6 analog outputs and can support S-VHS(Y/C)+CVBS+RGB, S-VHS(Y/C)+CVBS+YUV, Y1+C1+CVBS1+C2+Y2+CVBS2 and other combined output modes. In addition, QAMi5516 also integrates internal components such as audio subsystem, modem, clock generator, as well as on-chip peripheral interfaces such as smart card interface, asynchronous serial port, I2C transceiver and IEEE1284 enhanced high-speed parallel port.
4 Typical applications
In the application design, the performance requirements and limit parameters of the chip should be fully considered. Table 2 shows the main parameters of the QAMi5516.
Table 2 QAMi5516 limit parameters and electrical characteristics parameters
| Parameter | Symbol | Minimum value | Typical value | Maximum | unit |
| Power supply voltage 1 | VDD3MAX | 3.0 | 3.3 | 3.6 | V |
| Power supply voltage 2 | VDD18MAX | 1.6 | 1.8 | 2.0 | V |
| Input and bidirectional pin tolerance voltage | VI18MAX | GND-0.5 | VDD18+0.5 | V | |
| Input, Output, and Bidirectional Pin Tolerance Voltage 1 | VI5MAX | GND-0.5 | 5.5 | V | |
| Input, Output, and Bidirectional Pin Tolerance Voltage 2 | VO3MAX | GND-0.5 | VDD3+0.5 | V | |
| Output current | IOMAX | 20 | mA | ||
| Storage temperature | TSMAX | 55 | 20 | 125 | °C |
| Bias temperature | TAMAX | -55 | 20 | 125 | °C |
Figure 2 is a functional diagram of a typical DVB-C digital cable set-top box based on QAMi5516. When the DVB-C cable network transmits the digital TV RF signal (frequency range from 50MHz to 870MHz) transmitted by the coaxial cable to the front-end tuner, the signal is converted into an intermediate frequency signal with a center frequency of 43.75MHz. And input to the QAM demodulator inside QAMi5516 through IF in to complete signal timing recovery, carrier recovery, data shaping, adaptive equalization and Viterbi decoding (Viterbi, also known as trellis decoding), deinterleaving, RS decoding And de-randomization, and finally the resulting MPEG-2 compliant transport stream is output through the TSOUT string/parallel port. This completes the entire channel decoding. Obviously, this part of the function is mainly done by hardware, the software only needs to initialize and control the corresponding registers.
The MPEG-2 transport stream output from TSOUT is sent from TSIN1/2 to the source decoding module for demultiplexing, video decoding and audio decoding; then passes through PAL/SECAM/NTSCS video encoder, audio DAC and other processing modules. , you can output audio and video signals in the corresponding format.
The memory module mainly includes FLASH, EEPROM and SDRAM. FLASH is used to store user applications, EEPROM is used to store system, user configuration information and all program information. SDRAM is where the system and applications run, and video SDRAM is used as a video decoding buffer to store OSD data.
The peripheral interface module includes an interface with the outside world and a control circuit. The RS-232 and RJ45 network interfaces are used for system and host data transmission, and can also be used for system software upgrades and set-top box troubleshooting. The front panel and remote interface are used to receive input from the front panel and remote control. The smart card interface is used to support the CA conditional access control system, which complies with the ISO7816-3 international standard. In addition, the JTAG interface is used for software debugging and downloading.
In engineering design, the selection of the chip operating system is also crucial, but this aspect is more easily overlooked. In fact, the operating system often plays a considerable role in the development time, difficulty and price of the system. ST has a dedicated embedded operating system, STLite/OS20, optimized for the ST20 core in its accompanying software development kit, which greatly reduces the work of software programmers.
5 Conclusion
In order to minimize the design cost and speed up the development of digital TV set-top boxes, ST also provided complete design support, including circuit design scheme, PCB layout layout hardware, core embedded operating system, and complete QALi5516. The software development kit and the corresponding DEMO program code and other software can greatly shorten the time-to-market of the set-top box products and meet the competition needs.
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